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Low-Speed I/O

Modalix has two dedicated SPI channels plus eight configurable SIO blocks. Each SIO block can be configured to provide GPIO, UART, I2C or SPI, and an output pin multiplexer selects which function reaches each pin.

Mapping Guidelines​

When assigning SIO pins:

  1. Choose the Ethernet and PCIe channels you intend to use first — some pin functions are predefined and must be used with the corresponding PCIe and Ethernet interfaces.
  2. Within each SIO block, pins in the upper rows take priority and should be considered first.
  3. Use the function named in the Function column so the selected interface matches the pin's available functionality.

SIO Pin Mapping​

The 64-pin SIO interface is divided into eight 8-bit ports. All pins are I/O at 1.8 V.

SIO pinTypeVoltageInterfaceFunction
SIO0_IO[0]I/O1.8VUARTUART_RX
SIO0_IO[1]I/O1.8V—UART_TX
SIO0_IO[2]I/O1.8VI2CI2C_SCL
SIO0_IO[3]I/O1.8V—I2C_SDA
SIO0_IO[4]I/O1.8VGPIOGPIO
SIO0_IO[5]I/O1.8V—GPIO
SIO0_IO[6]I/O1.8VGPIOGPIO
SIO0_IO[7]I/O1.8V—GPIO
SIO1_IO[0]I/O1.8VI2CETH0_PTP_PPS
SIO1_IO[1]I/O1.8VI2CN/A
SIO1_IO[2]I/O1.8VGPIOGPIO
SIO1_IO[3]I/O1.8VGPIOGPIO
SIO1_IO[4]I/O1.8VSPISPI_CLK
SIO1_IO[5]I/O1.8V—SPI_CS#
SIO1_IO[6]I/O1.8VSPISPI_MOSI
SIO1_IO[7]I/O1.8V—SPI_MISO
SIO2_IO[0]I/O1.8VI2CETH0_SMA_MDC
SIO2_IO[1]I/O1.8V—ETH0_SMA_MDIO
SIO2_IO[2]I/O1.8VSPIN/A
SIO2_IO[3]I/O1.8V—N/A
SIO2_IO[4]I/O1.8VUARTUART_RX
SIO2_IO[5]I/O1.8V—UART_TX
SIO2_IO[6]I/O1.8VUARTUART_RX
SIO2_IO[7]I/O1.8V—UART_TX
SIO3_IO[0]I/O1.8VSPIPCIE0_PERST#
SIO3_IO[1]I/O1.8VI2CPCIE0_WAKE#
SIO3_IO[2]I/O1.8VI2CPCIE0_CLKREQ#
SIO3_IO[3]I/O1.8VGPION/A
SIO3_IO[4]I/O1.8VI2CI2C_SCL
SIO3_IO[5]I/O1.8VGPIOI2C_SDA
SIO3_IO[6]I/O1.8VPCIE2PCIE0_PERST#
SIO3_IO[7]I/O1.8VPCIE2PCIE0_WAKE#
SIO4_IO[0]I/O1.8VPCIE2PCIE2_CLKREQ#
SIO4_IO[1]I/O1.8VPCIE3PCIE3_PERST#
SIO4_IO[2]I/O1.8VPCIE3PCIE3_WAKE#
SIO4_IO[3]I/O1.8VPCIE3PCIE3_CLKREQ#
SIO4_IO[4]I/O1.8VI2CI2C_SCL
SIO4_IO[5]I/O1.8V—I2C_SDA
SIO4_IO[6]I/O1.8VI2CI2C_SCL
SIO4_IO[7]I/O1.8V—I2C_SDA
SIO5_IO[0]I/O1.8VI2CI2C_SCL
SIO5_IO[1]I/O1.8V—I2C_SDA
SIO5_IO[2]I/O1.8VUARTUART_RX
SIO5_IO[3]I/O1.8V—UART_TX
SIO5_IO[4]I/O1.8VUARTUART_RX
SIO5_IO[5]I/O1.8V—UART_TX
SIO5_IO[6]I/O1.8VI2CI2C_SCL
SIO5_IO[7]I/O1.8V—I2C_SDA
SIO6_IO[0]I/O1.8VI2CI2C_SCL
SIO6_IO[1]I/O1.8V—I2C_SDA
SIO6_IO[2]I/O1.8VGPIOGPIO
SIO6_IO[3]I/O1.8V—GPIO
SIO6_IO[4]I/O1.8VSPISPI_CLK
SIO6_IO[5]I/O1.8V—SPI_CS#
SIO6_IO[6]I/O1.8VSPISPI_MOSI
SIO6_IO[7]I/O1.8V—SPI_MISO
SIO7_IO[0]I/O1.8VSPISPI_CLK
SIO7_IO[1]I/O1.8V—SPI_CS#
SIO7_IO[2]I/O1.8VI2CSPI_MOSI
SIO7_IO[3]I/O1.8V—SPI_MISO
SIO7_IO[4]I/O1.8VSPISPI_CLK
SIO7_IO[5]I/O1.8V—SPI_CS#
SIO7_IO[6]I/O1.8VSPISPI_MOSI
SIO7_IO[7]I/O1.8V—SPI_MISO

GPIO​

Driver: gpio-dwapb

From user space, use libgpiod and its command-line tools:

ToolPurpose
gpiodetectList available GPIO chips
gpioinfoList chips and lines, with state and owning driver
gpiosetSet a line's value
gpiogetRead a line's value

Identify the chip and line first — devices appear as /dev/gpiochip0 and similar:

root@modalix:~# gpiodetect
root@modalix:~# gpioset gpiochip0 17 1
root@modalix:~# gpioget gpiochip0 17

For custom applications, use the libgpiod C API rather than driving the command-line tools.

Binding: snps,dw-apb-gpio.yaml

UART​

Driver: snps-dw-apb-uart

A UART node names its SIO block and index — uart12 is SIO block 1, index 2. Each SIO block provides up to 4 UART ports, each consuming 2 pins, so index 2 maps to output pins 4 and 5.

uart12: uart@0x0401a000 {
    compatible = "snps,dw-apb-uart";
    reg = <0x0 0x0401a000 0x0 0x100>;
    interrupts = <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
    reg-io-width = <4>;
    reg-shift = <2>;
    clocks = <&sio10_clk SIMAAI_SIO_DEV_UART2>;
    resets = <&reset10 SIMAAI_SIO_DEV_UART2>;
    pinctrl-0 = <&pins_uart12_deafult>;
    pinctrl-names = "default";
    dmas = <&dmac10 4>, <&dmac10 5>;
    dma-names = "tx", "rx";
    status = "disabled";
};

Enable it from an overlay:

&uart12 {
    status = "okay";
};

Clock, reset and other settings can be overridden in the same overlay. Each SIO block implements its own clock, reset, pin and DMA controllers, referenced by the node above.

Binding: snps-dw-apb-uart.yaml

I2C​

Two I2C interfaces are exposed on the 40-pin header (J12 on the Waveshare carrier card).

Confirming the Buses​

root@modalix:~# ls /dev/i2c-*
/dev/i2c-0
/dev/i2c-1

40-Pin Header Pinout (J12)​

PinSignalPinSignal
13.3 V power25 V power
3I2C1_SDA45 V power
5I2C1_SCL6GND
7GPIO09_AUD_MCLK8UART1_TXD
9GND10UART1_RXD
11UART1_RTS12I2S0_SCLK
13SPI1_SCK14GND
15GPIO1216SPI1_CS1
19SPI0_MOSI20GND
21SPI0_MISO22SPI1_MISO
23SPI0_SCLK24SPI0_CS0
25GND26SPI0_CS1
27I2C0_SDA28I2C0_SCL
29GPIO0130GND
31GPIO1132GPIO07
33GPIO1334GND
35I2S0_FS36UART1_CTS
37SPI1_MOSI38I2S0_SDIN
39GND40I2S0_SDOUT

Driver and Device Tree​

The I2C GPIO expander is supported by the PCF857x driver, enabled in arch/arm64/configs/simaai_modalix_defconfig:

CONFIG_GPIO_PCF857X=y

This covers NXP PCF8574 and PCF8575 I2C GPIO expanders — see simaai_modalix_defconfig. Enabling bus 0 with a PCF8574 attached:

/dts-v1/;
/plugin/;

&i2c00 {
    status = "okay";
    clock-frequency = <400000>;
    #address-cells = <1>;
    #size-cells = <0>;

    pcf8574: gpio@27 {
        compatible = "nxp,pcf8574";
        reg = <0x27>;
        gpio-controller;
        #gpio-cells = <2>;
    };
};

Command-Line Tools​

i2c-tools ships in the standard build; install it if missing:

root@modalix:~# apt update
root@modalix:~# apt install i2c-tools

Bindings: snps,designware-i2c.yaml and nxp,pcf8575.yaml

i2cdetect probes every address on a bus and reports which devices respond. -r uses SMBus read-byte probing, -y skips the confirmation prompt, and the final argument is the bus number:

root@modalix:~# i2cdetect -r -y 0

SPI​

Modalix has two dedicated SPI channels in addition to any SIO block configured for SPI. Device overlays for both the NVS SPI and SIO SPI paths, along with the SPI device driver and device tree bindings, follow the same overlay pattern shown for UART above.

References​

All of these are public:

ReferenceWhere
Building the kernel, device trees and overlaysBuild the BSP from Source
Kernel configurationsimaai_modalix_defconfig
Modalix device treesarch/arm64/boot/dts/simaai
Example overlaysdts/simaai/overlays
GPIO bindingsnps,dw-apb-gpio.yaml
UART bindingsnps-dw-apb-uart.yaml
I2C controller bindingsnps,designware-i2c.yaml
PCF857x expander bindingnxp,pcf8575.yaml

Next Steps​